Description: Parallel Algorithm Synthesis Procedure for High-Performance Computer Architectures, Hardcover by Dunn, Ian N.; Meyer, Gerard G. L., ISBN 0306477432, ISBN-13 9780306477430, Like New Used, Free shipping in the US Dunn (Mercury Computer Systems) and Meyer (computer engineering, John Hopkins University) present a parallel algorithm synthesis procedure that introduces parameters to control the partitioning and scheduling of computation and communication with the goal of implementing parameterized software components that can be tailored to exploit multiple scalar units within a single processor, hierarchical memories, and different configurations of multiple processors. The second half of the slim volume employs the parallel algorithm synthesis procedure in the design of three new adjustable algorithms for matrix factorization, and compares the results with competing algorithms. Annotation (c) Book News, Inc., Portland, OR ()
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Book Title: Parallel Algorithm Synthesis Procedure for High-Performance Compu
Number of Pages: Xi, 108 Pages
Publication Name: Parallel Algorithm Synthesis Procedure for High-Performance Computer Architectures
Language: English
Publisher: Springer
Publication Year: 2003
Subject: Systems Architecture / General, Systems Architecture / Distributed Systems & Computing, Algebra / Linear, Computer Science, Programming / Parallel, Data Processing, Algebra / General
Type: Textbook
Item Weight: 28.2 Oz
Item Length: 9.3 in
Subject Area: Mathematics, Computers
Author: Ian N. Dunn, Gerard G. L. Meyer
Series: Series in Computer Science Ser.
Item Width: 6.1 in
Format: Hardcover
